This invention relates in general to circuits for indicating signatures in a device and in particular to a circuit for indicating signature at a pin in the device where the pin is connected in parallel to a p-type diode and an n-type diode.
Due to manufacturing imperfections, integrated circuit dies sometimes contain malfunctioning cells. In anticipation of this, circuit designers have provided redundant cells. The die can then be repaired by programming so that a spare cell is used instead of a malfunctioning cell to carry on the desired functions of the die. The repair is usually carried out by means of lasers. Where certain cells malfunction after usage, cell redundancy allows the die to be repaired in the same manner.
After a die has been repaired, it is frequently important to be able to identify such die as one that has been repaired and distinguish it from one which has not been repaired. For this reason, conventional circuit design for integrated circuits employs signature circuits on the die to provide the means for distinguishing between the two types of dies. A typical signature circuit may include one or more fuses which are broken when the die has been repaired. Thereafter the signature circuit provides an output which is different from that provided by the circuit before the fuse was blown. By detecting the output of the signature circuit, it is possible to detect whether the die has been repaired or not. The fuses can be broken using lasers.
Integrated circuits are normally operated by applying voltages in a certain predetermined voltage range known as the operating range. In NMOS integrated circuits, for example, the circuits are normally tied to VCC and VSS voltage rails, where the voltage VCC of the first rail is within the predetermined voltage range. In NMOS integrated circuits, it is customary to apply a voltage to the circuit which is above that of the rail at VCC in order to detect the output of the signature circuit. The voltage applied to test the output of the signature circuit is much higher than the operating range of the circuit; such high voltages will stress the integrated circuit die and is undesirable.
Furthermore, the above-described method of applying high voltages to detect the signature circuit output is not feasible in CMOS-type integrated circuits. In CMOS-type circuits, the output of the signature circuit is typically connected to the output of complementary pair or pairs of p-type and n-type transistors. As will be explained in more detail below, such diodes may be real diodes or parasitic ones. Therefore, when a high voltage of either polarity is applied to an input/output pin of the signature circuit, the high voltage causes diode (real or parasitic) turn-on between the pin and the VCC power supply for the circuit. Such diode turn-on may cause latch-up which is undesirable.
The conventional systems for testing the signature of integrated circuits are not entirely satisfactory. Therefore, it is desirable to provide an improved signature circuit suitable for CMOS-type integrated circuits or any circuit whose signature testing pin is connected in parallel to a p-type diode and an n-type diode.